1. Field of the Invention
The present invention relates to integrated circuit packaging methods and, in particular, to packaging methods for light-sensitive integrated circuits.
2. Description of the Related Art
Traditional integrated circuit packages and packaging methods provided for an integrated circuit (also known as a xe2x80x9cchipxe2x80x9d or xe2x80x9cdiexe2x80x9d) to be connected to an external system and protected from deleterious environmental factors, such as moisture. In order to provide an integrated circuit (IC) package of minimum size, it can be desirable to essentially utilize the IC""s semiconductor substrate (e.g., a silicon wafer) as a portion of the package. For example, in chip scale package (CSP) packaging processes, bond pads (for the provision of input signals, output signals, supply voltage and ground) on an IC""s upper surface are directly connected to bond pads on a printed circuit board [PCB] via solder bumps. During such a CSP packaging process, an IC with attached solder bumps is flipped over and aligned with package bond pads. The solder bumps are then subjected to reflow processing in order to attach the IC""s bond pads to the PCB bond pads. In this scenario, the semiconductor substrate, on which the IC was formed, can remain exposed and be used as a portion of a completed IC package.
A drawback of CSP packages and packaging processes, and other packages and packaging processes that do not completely enclose the IC with opaque materials, is that the IC remains exposed to various light sources, such as incandescent light sources and the sun. For example, a PCB containing a CSP packaged IC may be placed in a non-opaque housing to create an esthetically pleasing design for cell phones and other consumer products. These designs, however, expose the IC to light. For light-sensitive ICs, such exposure can lead to interference with the operation of the light-sensitive IC, including unwelcome electrical currents/voltages, performance degradation, malfunction or shutdown.
Opaque layers can be applied to the upper and lower surfaces of multiple ICs formed in and on a semiconductor substrate (i.e., ICs in wafer form) during their manufacture. However, prior to packaging, ICs in wafer form are diced (for example, by being sawn) into individual ICs. The dicing process exposes lateral edges of the semiconductor substrates through which an IC can be exposed to light.
Still needed in the field, therefore, is a simple and inexpensive process for preparing light-sensitive integrated circuits for packaging that provides for a reduced exposure of the integrated circuit to light, particularly on the lateral edges of the IC which are exposed after dicing.
The present invention provides a process for preparing a light-sensitive integrated circuit for packaging that provides a reduced exposure of the integrated circuit-to light. This reduced exposure to light is accomplished by forming a layer of opaque material, such as a layer of opaque ink, on the semiconductor substrate lateral edges of an individual integrated circuit. Processes in accordance with the present invention are simple and inexpensive, and employ, for example, piezoelectric injectors to spray coat opaque ink on the semiconductor substrate lateral edges. In addition, since processes according to the present invention are independent of the techniques used to manufacture the light-sensitive integrated circuits, they provide for an increase in packaging process flexibility and economy.
Processes in accordance with the present invention include first providing a semiconductor substrate (e.g., a silicon wafer) with a plurality of light-sensitive integrated circuits (ICs) formed in and on its upper surface. The semiconductor substrate is subsequently diced to form individual light-sensitive ICs, each of which has a semiconductor substrate lower surface and semiconductor substrate lateral edges. Next, the semiconductor substrate lateral edges are spray coated with an opaque material (e.g., opaque ink) to form an opaque layer covering the semiconductor substrate lateral edges. The opaque layer prevents light from entering the semiconductor substrate through the lateral edges and thereafter interfering with the operation of the light-sensitive IC.
Other processes in accordance with the present invention include first providing a semiconductor substrate with a plurality of light-sensitive ICs formed in and on its upper surface. Next, the semiconductor substrate is diced to form individual light-sensitive ICs, each of which has a semiconductor substrate lower surface and semiconductor substrate lateral edges. An opaque material (e.g., a metal or polymer) is then deposited on the semiconductor substrate lateral edges to form a deposited opaque layer. The deposited opaque layer prevents light from entering the semiconductor substrate through the lateral edges and thereafter interfering with the operation of the light-sensitive integrated IC.
Yet other processes in accordance with the present invention include first providing a semiconductor substrate with a plurality of light-sensitive ICs formed in and on its upper surface. Next, the semiconductor substrate is diced to form individual light-sensitive ICs, each of which has a semiconductor substrate lower surface and semiconductor substrate lateral edges. The semiconductor substrate lateral edges are subsequently roughened to form roughened lateral edges that reflect incoming light (i.e., light impinging upon the semiconductor substrate lateral edges) in a manner that creates destructive interference of the incoming light, thereby preventing light from entering the semiconductor substrate.
Still other processes in accordance with the present invention include first providing a semiconductor substrate with a plurality of light-sensitive ICs formed in and on its upper surface. Next, the semiconductor substrate is diced to form individual light-sensitive ICs, each of which has a semiconductor substrate lower surface and semiconductor substrate lateral edges. The semiconductor substrate lateral edges are subsequently coated with a material to form a material layer with a thickness that provides for destructive interference of incoming light and, thereby, prevents light from entering the semiconductor substrate.
The above processes may also be used to coat the back of the IC with opaque material, in addition to the lateral edges, if desired. This can eliminate the need for a separate backside coating step.